Circuit Lab B/C

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Re: Circuit Lab B/C

Postby mdv2o5 » January 9th, 2019, 8:55 am

jaggie34 wrote:
knightmoves wrote:As drawn, the 12 and 6 ohm resistors are in parallel, so can be replaced by a single 4 ohm resistor.

The right hand loop on the picture is irrelevant, as the diode is reverse biased and does not conduct (proof left as an exercise for the reader).

So you have a simple loop circuit with a diode and 7 ohms of resistance, so i = 11.25/7 = 1.607A.

Now consider the 6 and 12 ohm resistors separately again. 1/3 of the current goes through the 12 ohm resistor (1/3 of the conductance), so answer = 0.536 A.


Why would you ignore the right side, isn't the diode not in reverse bias in respect to the 4V source?


To determine whether or not the diode is forwards or reverse biased, you need to look at the voltage across the diode. Here, the anode is indeed at 4V, but we have no idea what voltage the cathode is. Thus we can't find the voltage across the diode. If the cathode is at a lower voltage, then the diode is forwards biased and conducts. Otherwise, it's reverse biased. The problem is we don't know the cathode voltage. The way I initially solved the problem is to just assume that the diode is forward biased and is dropping 0.75 V and apply KVL/KCL. But then, I ended up with current flowing backwards through the right diode. This suggests that the diode might actually be reverse biased. Using this assumption, we try again and ignore the right half (since no current flows). As it turns out, the voltage at the cathode using this assumption is 6.432 V which is consistent with the assumption that the right diode is reverse biased since the voltage across the diode is now -2.432 V.

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Re: Circuit Lab B/C

Postby UTF-8 U+6211 U+662F » January 9th, 2019, 12:47 pm

jaggie34 wrote:
knightmoves wrote:As drawn, the 12 and 6 ohm resistors are in parallel, so can be replaced by a single 4 ohm resistor.

The right hand loop on the picture is irrelevant, as the diode is reverse biased and does not conduct (proof left as an exercise for the reader).

So you have a simple loop circuit with a diode and 7 ohms of resistance, so i = 11.25/7 = 1.607A.

Now consider the 6 and 12 ohm resistors separately again. 1/3 of the current goes through the 12 ohm resistor (1/3 of the conductance), so answer = 0.536 A.


Why would you ignore the right side, isn't the diode not in reverse bias in respect to the 4V source?

The 12 volt battery source overpowers the 4 volt source.

Edit: Whoops, I see a more detailed explanation has already been posted...

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Re: Circuit Lab B/C

Postby DocThorium » January 10th, 2019, 2:24 pm

I have a question about the rules regarding a possible contradiction.

3. c. The test will consist of at least one question from each of the following areas:
xiii. Division C only - Electrical characteristics of a silicon PN junction

3. d. Topics not included in the competition are: semiconductors, AC circuit theory, inductance, non-linear
devices, three-state logic gates, sequential logic, and oscilloscopes.

Aren't silicon PN junctions a semiconductor topic? If so, doesn't this mean that the rules contradict themselves, since they require a topic explicitly stated not to be in the test to be in the test?

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Re: Circuit Lab B/C

Postby UTF-8 U+6211 U+662F » January 10th, 2019, 4:29 pm

DocThorium wrote:I have a question about the rules regarding a possible contradiction.

3. c. The test will consist of at least one question from each of the following areas:
xiii. Division C only - Electrical characteristics of a silicon PN junction

3. d. Topics not included in the competition are: semiconductors, AC circuit theory, inductance, non-linear
devices, three-state logic gates, sequential logic, and oscilloscopes.

Aren't silicon PN junctions a semiconductor topic? If so, doesn't this mean that the rules contradict themselves, since they require a topic explicitly stated not to be in the test to be in the test?

Yes, silicon PN junctions are semiconductors. My guess is that Division C includes silicon PN junctions but no other semiconductor topics.

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Re: Circuit Lab B/C

Postby DocThorium » January 11th, 2019, 9:13 pm

UTF-8 U+6211 U+662F wrote:
DocThorium wrote:I have a question about the rules regarding a possible contradiction.

3. c. The test will consist of at least one question from each of the following areas:
xiii. Division C only - Electrical characteristics of a silicon PN junction

3. d. Topics not included in the competition are: semiconductors, AC circuit theory, inductance, non-linear
devices, three-state logic gates, sequential logic, and oscilloscopes.

Aren't silicon PN junctions a semiconductor topic? If so, doesn't this mean that the rules contradict themselves, since they require a topic explicitly stated not to be in the test to be in the test?

Yes, silicon PN junctions are semiconductors. My guess is that Division C includes silicon PN junctions but no other semiconductor topics.


Wouldn't that still be a contradiction in the rules, though?

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Re: Circuit Lab B/C

Postby Things2do » January 12th, 2019, 1:15 pm

DocThorium wrote:
UTF-8 U+6211 U+662F wrote:
DocThorium wrote:I have a question about the rules regarding a possible contradiction.

3. c. The test will consist of at least one question from each of the following areas:
xiii. Division C only - Electrical characteristics of a silicon PN junction

3. d. Topics not included in the competition are: semiconductors, AC circuit theory, inductance, non-linear
devices, three-state logic gates, sequential logic, and oscilloscopes.

Aren't silicon PN junctions a semiconductor topic? If so, doesn't this mean that the rules contradict themselves, since they require a topic explicitly stated not to be in the test to be in the test?

Yes, silicon PN junctions are semiconductors. My guess is that Division C includes silicon PN junctions but no other semiconductor topics.


Wouldn't that still be a contradiction in the rules, though?

To me, it sounds more like a exception rule 3.d. than a contradiction of it.
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Re: Circuit Lab B/C

Postby Creationist127 » January 12th, 2019, 3:26 pm

Things2do wrote:
DocThorium wrote:
UTF-8 U+6211 U+662F wrote:Yes, silicon PN junctions are semiconductors. My guess is that Division C includes silicon PN junctions but no other semiconductor topics.


Wouldn't that still be a contradiction in the rules, though?

To me, it sounds more like a exception rule 3.d. than a contradiction of it.

If anyone's really confused, an FAQ is probably the best route... but it can't be that difficult to study one extra topic, even if you don't need to.
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Re: Circuit Lab B/C

Postby SciolyHarsh » January 13th, 2019, 8:35 am

Tfw you go to an invitational feeling ready and the circuit test whips out gauss's law. Thank god I take E&M, but that test had more magnetism than AC/DC circuits questions. Only the lab was truly circuits
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Re: Circuit Lab B/C

Postby neerja.shah » January 14th, 2019, 6:02 am

When it says on the slideshows that some things are divison C only...does that mean that division b will not cover it at all? Such as op amps?

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Re: Circuit Lab B/C

Postby Creationist127 » January 14th, 2019, 6:57 am

neerja.shah wrote:When it says on the slideshows that some things are divison C only...does that mean that division b will not cover it at all? Such as op amps?

Yes, Division B is not supposed to cover things labeled "Division C only" at all. However, especially in invite-level settings, there are often cases when these topics are included on Div B tests, due to ignorance or laziness of the ES. So, it wouldn't hurt to study the 'Div C only' topics, even if you are in Div B.
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Re: Circuit Lab B/C

Postby jaggie34 » January 16th, 2019, 9:21 am

Does anyone know what a placing score would be at MIT?
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Re: Circuit Lab B/C

Postby mdv2o5 » January 18th, 2019, 12:08 am

jaggie34 wrote:Does anyone know what a placing score would be at MIT?

Hello! I'm not the actual day-of ES for Circuit Lab at MIT, but I wrote a few of the exam questions and the lab portion for the MIT Invite. We won't be giving many details about raw scores at the moment, but I can give you some general benchmarks. I highly encourage you all to take the exam as practice when it is released, since I believe it gives a glimpse into some "real" electrical engineering lab skills.

Written Portion
With regards to the written exam, I feel like it leaned a bit on the easier side as MIT exams go. We were careful to try to hit all the required topics without going overboard into any crazy details since you can pretty much go arbitrarily deep into electrical engineering topics. A strong team should be able to finish nearly all the problems in this exam individually with relatively little difficulty since none of the questions require any kind of extensive math. However, the difficulty lies more in the bulk of questions (especially given that teams had to complete two lab stations). What this means is that strong teams should be very familiar with the relevant formulas without the need to look everything up. For instance, the series of questions about Ohm's Law and power can reasonably be completed at a rate of about 15 seconds per problem. This does imply a certain degree of memorization, but I would say that this naturally comes from doing more of these types of problems rather than intentional rote memorization. In summary, the written portion serves as a check that you are familiar with the basic concepts of circuits. Any questions that you are having trouble with is a strong indication that you really need to study more in that area since we were testing many of the fundamental concepts listed in the rules. High-scoring teams at MIT are getting above 70% of the questions correct, but I think that by the time of Nationals, placing will require getting nearly 100% on this particular written portion.

Lab Portion
Station 1
The lab portion of the MIT exam is a bit of a different beast. I wanted to ensure that the labs spanned a wide range of difficulty to provide something for teams of all levels. This was probably most evident in the first station in which Circuit 1 was simple and Circuit 3 became quite involved. While I had designed each station to be finished in 6 minutes, we did not actually implement this time restriction on the day of. All teams were given as much time as they needed. That being said, I would recommend practicing with a 6-minute time limit with a partner. The labs will be much more difficult. The instructions on the labs even guided you to finish collecting the necessary measurements and copy down the circuit schematics quickly before finishing up the calculations later at your desk.The reason behind the time crunch was two-fold. First, I was having a lot of fun coming up with the labs, and I wanted to show the competitors some cool circuits. Second, and more importantly, my goal was also to separate the teams that had gone to the effort of practicing with real breadboards and multimeters. Looking at real circuits is entirely different from having them spelled out for you on a nice schematic. Your ability to finish Station 1 depends heavily on your ability to interpret the circuit on the breadboard and transfer that into a schematic. I didn't like the idea of having competitors read resistor codes since it really isn't all that important in actual EE (if you need it, you will pick it up with experience), so pretty much all of the visible resistors were either 1k (brown-black-red) or 10k (brown-black-orange) to make them easy to read. Note that this may not be the case for other ES's, so I would definitely recommend doing some practice -- it's not that hard once you get the hang of it. However, being able to read and use a breadboard is super important, and it only takes about an hour or two to become really good at it -- that's a pretty good return on investment in terms of time spent vs points received! Spend an hour and about $20-$30 and get yourself some tools to practice with. This may be the single best thing you can do for yourself to improve on the lab.

Station 2
Station 2 had some more interesting circuits on it. The first circuit was fairly standard. There was nothing new really tested in here, but it kind of relied implicitly on understanding Thevenin equivalent resistance or the idea that there are things you can determine about an unknown portion of a circuit only by looking at the port of the "black box". For instance, power consumption by the black box only depends on the input voltage and the current flowing through it. You don't need to know what's happening inside. This kind of abstraction will trip up a lot of newcomers to electronics.

The goal of the second circuit was to show competitors an op-amp in real life. While integrated circuits (ICs) are not explicitly on the rules (or for that matter banned by the rules), I decided that it was more valuable as a learning experience to throw an actual op-amp IC, the LM358, on there and show competitors how these things are used in real life. Since most people probably have never seen one before, I tried to make it as easy as possible to understand what was going on by providing the entire schematic and the nicest diagram I could find of the IC pinout. The goal was not to trip up too many people on the breadboard layout or the IC pinout. The point I was actually trying to make was that real life op-amps have limitations which is what the problem explored by driving the op-amp all the way to the rail. In fact, this question was mostly theoretical. Only two measurements were needed, and I explicitly ask for them -- no need to go hunting for them during the lab. The rest of the question asks about some limitations of the op-amp and to explain your observations in the lab.

The third circuit looked a lot scarier than it was with three ICs and flashing lights. I had joked to one of my friends that this question will test who is the best at not panicking during an exam. In fact, the questions for this circuit were probably the easiest questions in the entire lab. You are not responsible for any of the ICs. All I was testing was your ability to watch the lights blink and see the logic gate in action. This is not some evil joke or anything. Frequently in electrical engineering, you will find really complicated and daunting circuits. It is important to be able to narrow your focus down to the part that you care about and not get overwhelmed. This was precisely the skill tested in this circuit. This is helpful to remember for future circuit lab exams: most of the labs you will see will not be this involved or have this many parts (believe me -- this took a long time to put together). So as long as you avoid freaking out during the exam, you should be able to reason your way through anything you might encounter. As a side note, the other ICs on this circuit are just used to cycle through the truth table. I included a short write-up about the setup that should be released with the exams soon if anyone was curious about it. It's not really part of the curriculum, but the circuit is pretty cool.

With regards to the entire lab section, teams did not get as many points as on the written portion. There was fairly high variance even within the highest scoring teams on the lab section. I will say that for teams aiming to be competitive nationally, they should be able to get around 80-90% on this lab portion. The key is to work together between the partners to finish the questions since time is short. In any case, hopefully these exams will be of use as you continue your preparations. Teams that went to MIT will be given the email of the ES to ask questions. For everyone else, I will also be hanging around the forums to answer any questions you may have (on this exam or others).

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the LAB portion

Postby geniusjohn5 » January 19th, 2019, 4:13 pm

Any good resources/videos to get myself acquainted for the LAB portion of this event? I have a hodgepodge of circuit stuff, but I'm not sure what to do with them :/
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Re: Circuit Lab B/C

Postby UTF-8 U+6211 U+662F » January 19th, 2019, 5:45 pm

geniusjohn5 wrote:Any good resources/videos to get myself acquainted for the LAB portion of this event? I have a hodgepodge of circuit stuff, but I'm not sure what to do with them :/

The lab portion can pretty much be anything, but check the post above you for what it was like at MIT

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Re: Circuit Lab B/C

Postby neerja.shah » January 28th, 2019, 2:15 pm

Was anyone at the Westlake Invitational? The division B test was very hard (am i the only one who thinks that?!) and most questions were about magnets and capacitance..


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